Nasm source to toggle l1 cache

April 7, 2013 at 18:57:13
Specs: Linux
I know it involves setting it's in cr0 reg but I not sure wth bits to set to turn off and on the l1cache

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April 7, 2013 at 23:12:59
You can easily find the answer to this question by reading the Intel (or AMD) Programmer's Reference manual (which you should do anyway if you are attempting this level of programming). IIRC it is bit 30 that needs to be toggled.

You will, of course, only be able to do this from a program running in Ring 0.

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