|I'm working on a legacy product, so I can't adjust the crystal or board in any way. It was originally written in PicBasicPro and I'm moving things over to Hi-Tech C.|
It's a Pic18F4525 http://www.kynix.com/Detail/1204913... and has a 20Mhz crystal. According to the datasheet, the PLL just multiplies the frequency by 4.
So, this would give me a frequency of 20Mhz
__CONFIG(1, HS & IESOEN & FCMEN);
This would give me a frequency of 80Mhz
__CONFIG(1, HSPLL & IESOEN & FCMEN);
Surprisingly, by enabling HSPLL, the serial port outputs correctly, lcd still outputs, other than delay times I didn't see anything break.
So, my question is, what frequency is the clock running? Is it really running 80Mhz with PLL? or does the Hi-Tech C compiler know the max clock speed is 40Mhz and limit it there?
I will probably just stay safe and leave it at 20Mhz, but I would have expected serious problems clocking a 40Mhz chip to 80Mhz and didn't see any.
message edited by doris12