Hi there. If I have a data bus size of 4 and and address bus size of 8 how do I determine the amount of memory that can be addressed? If I wanted a processor to transfer 7 bits per cycle how would I determine the data and address bus sizes? Thanks for any help

There's no equation. Basically, it boils down to the storage capacity of the CPU's global integer registers (or general purpose registers). The data and address buses (external) cannot be exactly derived from this information. They are usually equal or larger, though. In your example of 7 binary bits, the CPU needs a 7bit GP register and a 7bit data bus. The address bus need only be large enough to pass the memory address.

G'day, If I think what you are asking is what maximum number of data words can be stored over a certain range of addresses then just be aware that the data bus determines the size of the data and the address bus determines how many. ie an 8 bit address bus will point to 2^8 or 256 unique addresses (0-255); it doesn't matter what the data bus width is, but in your case 4 bits would be the size of the data (ie 256x4). For your last question, the data bus would be 7 bits, but the address bus would determined by how many you want to store. As anonproxy has pointed out, the internal registers are usually multiples of the data and address buses (unless it's the Intel i86 processors of course..) eg With most 8bit data and 16bit address bus processors, most internal registers are 8 bit with some combined to make 16 bit addresses. Have a look at the architecture of some of the early 8/16 bit processors. regards, Elric